alt.hn

7/21/2026 at 3:54:16 AM

Running Doom on Our Custom CPU and Going Viral

 https://www.armaangomes.com/blogs/doom/

by arghunter

7/21/2026 at 2:17:01 PM

> posted a video that got a few million views

Anybody got a link to that?

Is it this?

https://www.instagram.com/armaan.gomes/reel/DatqWKChtnw/?hl=...

I was expecting a real video, not some 9 second clip posted to random social media website.

by tantalor

7/21/2026 at 3:07:21 PM

> instagram

> random social media website

by jervant

7/21/2026 at 12:15:59 PM

Cool, I thought this was a CPU custom designed for Doom, but I guess that's just a 486 :)

edit: I went to down a quick hole "The historical footnote is that a version of this genuinely happened. SNES Doom shipped with a Super FX 2 in the cartridge, a custom RISC chip with a pixel-plot instruction, because the console's own CPU had no chance. Jaguar and PlayStation ports both moved the rasteriser onto dedicated hardware. Doom's design was shaped by the absence of an FPU, and then hardware kept getting built to catch up with it."

by _joel

7/21/2026 at 3:15:50 PM

> SNES Doom shipped with a Super FX 2 in the cartridge, a custom RISC chip with a pixel-plot instruction, because the console's own CPU had no chance.

The Super FX is a custom RISC chip, but it was custom made for Star Fox and used for other projects with refinements.

by toast0

7/21/2026 at 2:08:23 PM

> but I guess that's just a 486

*just* a 486. :-(

by blastonico

7/21/2026 at 1:45:31 PM

This is just RV32I-ZMMUL not a custom architecture, bt if you do want to see something from scratch, without any premade ISA or anything, here is an NPU I built: https://www.armaangomes.com/blogs/kernn/

by arghunter

7/21/2026 at 4:33:33 PM

When you say "can upload any model to it" are you talking LLM models? Surely there is a limit eg. parameters

by ge96

7/21/2026 at 6:09:20 PM

Yeah, anything that fits into memory, which on that FPGA is very limited. It was built for fun rather than production.

by arghunter

7/21/2026 at 7:30:06 AM

Great work!

This reminded me of a project I built a while back: a RV32IM emulator in C++ that can boot and run DOOM. Initially I implemented only RV32I, and implementing the M extension provided a massive speedup!

If anyone's curious, here's the source code: https://github.com/lalitshankarch/rvcore

by Flex247A

7/21/2026 at 7:41:03 AM

Nice one! Sounds like a fun project to do. Did you follow any tutorial or guide for this? If so, I would appreciate it if you shared it.

by kailpa1

7/21/2026 at 10:15:12 AM

If you don't want to delegate the fun of learning to an LLM, here's how I've built a RV64IM simulator in C in a weekend. All you need is an opcode table, the RISC-V specs and to implement each instruction; the good thing of RISC CPUs is that instructions are very simple (i.e. pretty much everything is a variation of `dest = src1 OP src2`) and memory instructions are dedicated. The other cool thing is that there are no "flags". Start with the base instruction set, then you can add M on top later. 64-bit support requires just a handful more instructions to zero/sign extend from 32-bit.

Then, wire your simulator to https://github.com/riscv-software-src/riscv-tests, and there you have an official test suite. When everything passes, you have a fully-compliant RISC-V CPU. You can at this point tell GCC or Rust or your favourite language to compile to RV32IM and see it run on your simulator. It's a very gratifying process.

If you get at this stage, you might want to use the ecall instruction to hard-code I/O operations such as "read from stdin" or "print a character", and there you have a sandboxed CPU that you can target with your favourite programming language. Make it run DOOM (start with https://github.com/ozkl/doomgeneric and see which I/O do you need), or turn it into a toy game console; the sky's the limit.

---

Here's a copy-paste of the list of resources I have saved in my notes:

- https://github.com/libriscv/libriscv A very fast RISC-V VM with sandboxing of memory and syscalls.

- https://luplab.gitlab.io/rvcodecjs/ RISC-V Instruction Encoder/Decoder

- https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/noteboo... Reference card

- https://cs.brown.edu/courses/csci1952y/2024/assets/docs/risc... Spec

- https://riscv-software-src.github.io/riscv-unified-db/manual...

- ABI: https://lists.riscv.org/g/tech-psabi/attachment/61/0/riscv-a...

Good luck!

by sph

7/21/2026 at 10:39:25 AM

Huge thanks! Will certainly try doing that.

by kailpa1

7/21/2026 at 8:51:10 AM

Hi, I didn't follow any specific guide on this, but asked ChatGPT about the bare minimum environment needed to run DOOM. From there, I figured out how to execute the instructions using a switch-case and how to make a custom syscall to trigger rendering.

I made a post a while back that details the entire process: https://www.reddit.com/r/EmuDev/comments/1t1or4j/doom_runs_o...

by Flex247A

7/21/2026 at 10:40:10 AM

Thanks, am going to check it out.

by kailpa1

7/21/2026 at 10:23:19 AM

Reading "Custom CPU" I expected wafer.space, instead of FPGA.

by Archit3ch

7/21/2026 at 1:44:05 PM

We hope to tape it out, along with an NPU and GPU once we raise $10k. Though first we have to find $10k :(

by arghunter

7/21/2026 at 2:30:04 PM

I think you need one more zero.

by varispeed

7/21/2026 at 5:19:54 AM

For anyone else curious: custom FPGA-based CPU code but not a custom architecture. This is an RV32I core. The article takes along time to give up this fact.

by dmitrygr

7/21/2026 at 7:04:43 AM

Deciding on an ISA like RV32I only sets constraints on your architecture, it doesn't give you any of it for free. So I think it's entirely valid to say that it's a custom architecture if they didn't use any pre-existing CPU design.

Basically, they had the API interface and implemented everything behind it. I think saying that "it's an RV32I core" vastly underrates the design work that goes into actually implementing an RV32I core from scratch.

by kryptiskt

7/21/2026 at 8:07:44 AM

Making a particularly good core is hard. Making a core to the minimum risc-v spec is what you do in a single college course. It's what the ISA was designed for.

by Dylan16807

7/21/2026 at 7:05:53 AM

It's a custom implementation of an existing architecture

by voidUpdate

7/21/2026 at 9:11:54 AM

It's common to call the instruction set just "architecture", or ISA (instruction set architecture) to be more precise. The implementation is commonly called "microarchitecture".

by ahartmetz

7/21/2026 at 10:22:11 AM

RV32I doesn't define any architecture, it's just an ISA i.e. a software contract that happens to be implementable in hardware. The CPU could run on outer space goop and still be RV32I.

by speed_spread

7/21/2026 at 2:30:29 PM

"RV32I doesn't define any architecture, it's just an ISA."

My friend...

by Brian_K_White

7/21/2026 at 4:03:11 PM

You are right, 'A' stands for Architecture. _Instruction Set_ Architecture that is. Not CPU architecture. I should have been more clear:

> RV32I doesn't define the hardware architecture

FTFM - satisfied?

by speed_spread

7/21/2026 at 7:18:42 AM

The *architecture* is RV32I_Zmmul which is unambiguously neither new nor custom.

What you describe (the specific implementation details of a core) is *microarchitecture*. In this case clearly a lot of work was done and it is cool, but the *architecture* is indeed RV32I and not custom

I was not undermining anything. I was helping others find the info I sought and took a while to find. This is why i left my comment. Everyone has their own interests. As an example, my thoughts were "whoa... a new architecture... did they write a new compiler or rewrite doom in assembly?" and for that "it is rv32i" would have been a quick answer.

by dmitrygr

7/21/2026 at 6:07:03 AM

thanks for saving me the time but it is pretty cool to see i'd love to learn more about fpga my goal is to run very old rare consoles

by zuzululu

7/21/2026 at 8:19:43 AM

[dead]

by ahk-dev

7/21/2026 at 3:05:39 PM

I wonder, if Doom didn’t exist, what would have taken its place for the “can it run X” usage.

by layer8

7/21/2026 at 3:40:57 PM

Doom 2. And only John "Benevolent hyper-intelligent architect of the post singularity simulation we all live in" Carmack would know why he named it that.

by AndrewOMartin

7/21/2026 at 9:19:57 AM

why Zmmul and not full M — is it just fpga area, or did the doom port let you drop div/rem?

by terekhindc

7/21/2026 at 1:18:31 PM

I'm kinda lazy lol. We are also implementing out-of-order rn, so we want to get a really solid rv32i setup going before adding multiplication, floating point, vector, etc.

by arghunter

7/21/2026 at 5:23:44 AM

Always a delight seeing Chisel in the wild :)

by sweetjuly

7/21/2026 at 4:18:40 PM

Well, Doom runs everywhere.

by caruasdo

7/21/2026 at 4:39:35 PM

We need to update Stardew Valleys saloon game to play Doom

by neonmagenta

7/21/2026 at 10:20:43 PM

That would be kinda sweet.

by tracker1

7/21/2026 at 11:54:23 AM

[dead]

by deton3991

7/21/2026 at 9:44:01 AM

[dead]

by huflungdung