alt.hn

7/17/2026 at 2:24:21 PM

85.3 GFlops: Optimizing FP32 Matrix Multiplication on a Single AMD Zen 3 Core

 https://github.com/houslast3/85.30-GFLOPS-Single-Core-FP32-Matrix-Multiplication-on-AMD-Zen-3

by houslast

7/20/2026 at 8:20:23 PM

What's the language? My Firefox detected it as English, I suppose it is because of lang=en in HTML

by gitowiec

7/20/2026 at 8:31:44 PM

Brazilian Portuguese.

Funnily enough, it took me a while to determine it was definitely Brazilian Portuguese, given I'm a native Portuguese speaker, because the whole thing is written in a stiff academic-ish style that hides some the differences between European and Brazilian Portuguese.

by pdpi

7/21/2026 at 12:23:28 AM

I grew up in Spain close to the border with Portugal, so even though I don't speak the language (something which I really regret) I am familiar with it. What are the major differences between European and Brazilian Portuguese? I only know that Brazilians use the gerund like us Spanish speakers, whereas European Portuguese uses "estar a" + infinitive.

by pezezin

7/21/2026 at 1:50:12 AM

Spelling used to be a big one. E.g. in the opening sentence of the article, the word "otimização" would've been an obvious sign it was Brazilian, because the usual European Portuguese spelling was "optimização" — we had a bunch of silent consonants like that all over the place, but most of those got removed once Portugal started adopting the 1990 orthographic agreement[0]. Speaking of spelling differences, now that I'm re-reading, I could've noticed it was Brazilian from "ingênua" in the first section (would've been "ingénua" in European Portuguese).

A common pattern in the readme is the use of "em um" ("in/on a" in English), which is idiomatic in Brazilian, but not in European Portuguese, where the contraction "num" would be standard. It's one of the cases that could be attributed to overly stiff academic writing, though.

0. https://en.wikipedia.org/wiki/Portuguese-Language_Orthograph...

by pdpi

7/21/2026 at 5:59:40 AM

Obrigado for the explanation and the interesting link :)

by pezezin

7/20/2026 at 9:30:16 PM

> My Firefox detected it as English

Try selecting some text in the README, and right-clicking then "Translate to ..." and the autodetect might do a bit better to identify the language.

by embedding-shape

7/20/2026 at 8:57:21 PM

What is interesting here is that this is an optimization study, whose goal was to determine the optimum implementation variant for matrix multiplication on a Zen 3 CPU.

It is likely that a similar optimization strategy would work for a modern Zen 5, though some of the parameters for the optimum variant would probably have double values, because Zen 5 has twice more registers, each double in size, and it can process and transfer a double number of FP32 per clock cycle.

The value given by the author of 63.5% of the theoretical maximum throughput, is likely to be pessimistic, because when doing heavy computations the clock frequency of the CPU will drop, so the actual efficiency might be higher, e.g. perhaps of 70% to 80% of the theoretical maximum throughput at that clock frequency.

The ATLAS BLAS-compatible library attempted to perform automatically such an optimization for its host computer, but I have not studied it to see whether its optimization methods would still work on modern CPUs with AVX+FMA or with AVX-512.

by adrian_b

7/20/2026 at 9:44:42 PM

[flagged]

by devy

7/20/2026 at 8:13:35 PM

For comparison, the best performing GPUs today can do FP32 at > 100 TFLOP/s

by ranger_danger

7/20/2026 at 8:34:40 PM

Zen3 isn't the best performing CPU today, though of course it'll never approach GPU level (which is pretty much ASIC level for matrix muls with special units). CPUs are getting dedicated "AI accelerators" too so it'd be interesting to compare per watt. The real limit is almost certainly memory bandwidth, not flops.

It would also be very interesting to see someone like Fabien Giesen / ryg do a maxed out AVX512 version for Zen5. His code's so fast it makes Intel 13900k's self destruct.

by pixelpoet

7/20/2026 at 9:28:56 PM

Matrix multiplication is one of the few operations that isn't regularly limited by memory bandwidth. BLAS implementations come with several heavily optimized, architecture-specific versions of sgemm.

by zzzoom

7/21/2026 at 1:12:12 AM

Well, it does rely on decomposing the problem to optimize cache efficiency.

I don't read Portuguese, but the tables of results seem to imply they are tuning block sizes that leverage the L3 cache. They also talk about prefetch, which tends to matter more as you are approaching a streaming pattern.

So, a single core result may not scale linearly for multicore, given that there will be some cache contention, right? It's a very different tuning problem to optimize each of N cores to use its 1/N fraction of cache while sharing the available bandwidth for cache misses.

by saltcured

7/21/2026 at 1:18:59 PM

My go-to rule that's held since 2008 has been that a GPU can do about 10x the math that a similarly-priced CPU running properly optimized code can.

My 5070Ti can realize about 20 TF/s while a 12-core Zen5 can do 2.

by markstock

7/20/2026 at 8:42:37 PM

The throughput quoted here is for a single core, and it is not reported any attempt to measure how well this scales to all cores.

A modern Zen 5 should reach a throughput more than twice this value per core, with a total over 3 TFLOP/s for the complete CPU.

That 100 TFLOP/s for FP32 is for a GPU that might cost from 30 to 100 times more than a desktop CPU, so it is not certain that its performance per dollar is any better than for the desktop CPU.

This is very different from 7 to 10 years ago, when GPUs had a far higher performance per dollar than any CPUs. Since then, the performance per dollar of the desktop CPUs has increased, mainly because their prices have not increased much, while the performance per dollar of the GPUs has decreased, mainly because of a great increase in their prices, especially for the "datacenter" GPUs, which now may be more than 10 times more expensive than they were 7 years ago.

by adrian_b

7/20/2026 at 9:11:31 PM

Certainly not in a single core (however the given GPU wishes to define it)? This comparison would seem more apt to the largest multi-core CPU results.

by zamadatix

7/20/2026 at 9:31:33 PM

Could alternative CPU architectures like ternary/quaternary and/or analog etc be better at matrix multiplication?

by Razengan

7/20/2026 at 10:17:20 PM

Analog is certainly better, so long as you're OK with some noise.

by entropicdrifter

7/21/2026 at 8:52:08 AM

Is that the point of intelligence anyway? The fuzziness

by Razengan

7/21/2026 at 7:33:54 PM

How is intelligence fuzziness?

Which shows a sign of intelligence? "The problem is fuzzy to me." vs "The problem is understood by me."

Are you aligning fuzziness with lack of information / what you know now is all you got at the moment?

by yndoendo

7/21/2026 at 8:10:06 PM

As in "fuzzy logic"

by Razengan

7/17/2026 at 2:24:21 PM

Pushing the Limits of AMD Zen 3: Achieving 85.3 GFLOPS on a Single Core! I recently took on the challenge of squeezing every drop of performance out of a single AMD Zen 3 core, successfully reaching a blazing-fast 85.3 GFLOPS in FP32 matrix multiplication. By diving deep into low-level software optimization—focusing on advanced SIMD vectorization, strict cache management, and instruction pipelining—I managed to maximize CPU efficiency without relying on multi-threading. This project serves as a powerful proof of concept for high-performance computing (HPC) enthusiasts, proving that deeply optimized code can still unlock incredible hidden potential in modern silicon.

by houslast