6/12/2026 at 4:24:16 AM
by mfiguiere
6/12/2026 at 6:48:01 AM
Considering how slow FPGA are, compared to ASICs, I wonder why multi-phase clocks aren't more common. It really allowed early processors, like the 8088 and 6502, to get a lot more out of the silicon technology of the time. If the design tools supported them better, working with DDR timing would be trivial.by dlcarrier
6/12/2026 at 5:55:21 AM
I'm only halfway through but it's refreshing to see such technical articles on HN. Can't claim I'm very knowledgeable in hardware description languages either, but I do light embedded work sometimes and it's really interesting to see how the nitty gritty hardware peripherals and their clocks actually get implemented.by bschwindHN